The invention relates to a data coding method useful in image processing systems, and the following description refers to that field of application for convenience of illustration only. As is well known, in many digital image processing systems, or Digital Signal Processing (DSP) systems, as well as in microprocessor systems, data is traditionally encoded as twos-complement. This type of coding is actually very useful to also encode the values of negative numbers, so that algebraic operations (arithmetical operations on signed numbers) are easily performed. As a result, the design of arithmetic-logic units performing such algebraic operations can also be simplified.
More precisely, if an integer N coded to a base R and having an integer number K of digits is assumed, such that:N=(nK−1. . . n1 n0)R the representation CR of the negative value of this number, also to the base R, will be:CR=RK−N In a numerical example, when N equals 7, the following representation to the base 2 is obtained:N(=7)=(0111)2 and the representation of its negative value becomes:CR(=−7)=24−7=9=(1001)2 
In practice, to obtain the representation to the base 2 of a negative number, it is necessary to perform the ones-complement of the corresponding positive number (i.e. to invert the value of each bit), and then add 1.
In another numerical example, for a number N=00100101 (+37 in the decimal, the first bit being the sign bit), it is:CR=(−37)=28−37=219=(11011011)2 i.e.:
TABLE 10 0 1 0 0 1 0 1→(+37 as complemented to 2)1 1 0 1 1 0 1 0+→(complement to 1)11 1 0 1 1 0 1 1→(−37 as complemented to 2)
From Table 1 above, it is directly seen that the transition from a positive number to a negative number involves switching a large number of bits (the first seven bits, bold-faced in Table 1).
Furthermore, the representation as twos-complement brings about an important problem relating to the extension of the sign bit. To appreciate the problem, consider a transition from (+1)10 to (−1)10 with a data representation encompassing 8 bits in twos-complement. It is easily seen that this transition corresponds to:
TABLE 20 0 0 0 0 0 0 1→(+1)101 1 1 1 1 1 1 1→(−1)10
In other words, this sign transition involves variation of 7 bits out of 8. This same problem is encountered with representations of sign-less numbers, when from a value (RK/2)−1 one moves to a value (RK/2), R being the numbering base and K the number of digits used. In this case, taking any base-2 representation of 8 digits (or bits), it is seen that such a transition also involves extensive bit variation. In particular, assuming a numerical example of R=2 and K=8, it is:(RK/2)−1=(28/2)−1=127(RK/2)=(28/2)=128And in the eight-digit notation, it is:
TABLE 30 1 1 1 1 1 1 1→(+127)101 0 0 0 0 0 0 0→(+128)10i.e., variation of 8 bits out of 8.
This is to say that variations occurring between symmetrical values about the midpoint of the data representation range are bound to involve considerable variation of bits in the digital representation of the data. In particular, the extensive bit transitions involved in going from one number to another penalize, in terms of power consumption, the arithmetic-logic unit that is processing the transitions. This problem is only in part addressed in the literature, both in connection with the twos-complement representation and with negative numbers.
In particular, in the articles “Minimizing Power Consumption in Digital CMOS Circuits” by S. Chandrakasan and R. W. Brodersen, IEEE Proceedings, vol. 83, No. 4, pages 498-523, April 1995, and “Analytical Estimation of Signal Transition Activity for Word-Level Statistics” by S. Ramprasad, N. R. Shanbhag and I. N. Hajj, IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 16, No. 7, pages 718-733, July 1997, methods of processing negative numbers are described and approaches proposed for overcoming the above critical transactions. These documents specifically teach reducing the switching activity by the adoption of a modulus and sign representation.
In this case, in the respect of the transition from +1 to −1 mentioned above, it is obtained:
TABLE 40 0 0 0 0 0 0 1→(+1)101 0 0 0 0 0 0 1→(−1)10i.e., the sign variation involves changing one bit only.
However, the representation by modulus and sign has two major drawbacks:                a first drawback is the introduction of an additional coding for 0. In fact, it is:        
TABLE 50 0 0 0 0 0 0 0→(+0)101 0 0 0 0 0 0 0→(−0)10Therefore, there are two different codings for the number 0, i.e. for the middle value in the representation range.
The second drawback is tied to the first and includes the range of representation being restricted. In fact, whereas in the representation as twos-complement with K bits to a base R all the integers in the [−RK-1, RK-1] range can be represented, in the modulus and sign representation the range becomes [−(RK−1−1), RK−1−1 ].
The technical problem that underlies this invention is to provide a method of coding digital data, which method can reduce the number of bit switches in specific critical transitions, thereby overcoming the limitations and drawbacks of prior art methods.